Download PDFOpen PDF in browserA Novel Ultra-Low Voltage Fully Synthesizable Comparator Exploiting NAND GatesEasyChair Preprint 103954 pages•Date: June 14, 2023AbstractIn this work a novel ultra-low voltage, ultra-low power fully synthesizable comparator is presented. The proposed architecture exploits only 2-input NAND gates, that allow minimization of the area footprint and scalability up to extremely low supply voltages. An extensive simulation campaign in a 130 nm CMOS technology has shown state-of-the-art performance in terms of power-delay-product for supply voltages down to 0.3V. Simulations also show good robustness under mismatch and PVT variations, proving the feasibility of the approach. Keyphrases: Internet of Things, dynamic comparator, fully-synthesizable, standard cell-based, ultra-low power, ultra-low voltage
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